1. Field of the Invention
The present invention relates generally to absolute value comparing apparatuses and, more particularly, to an absolute value comparing apparatus for comparing absolute values of applied data at a high speed. The invention has a particular applicability to video signal processing apparatuses.
2. Description of the Background Art
Processings for comparing data are frequently carried out in general in various electronic apparatuses, typically computers. In some case, a processing for comparing absolute values of data is often necessary. In an image input apparatus requiring a real time processing, for example, a high speed comparison processing with respect to absolute values of image data is required in order to detect a motion vector from the image data. The present invention is applicable in general to absolute value comparing apparatuses for comparing absolute values of applied data at a high speed. A brief description will now be made on a video signal processing apparatus as an example of a field of art in which a processing for comparing absolute values of data is required.
FIG. 13 is a block diagram of a video signal processing apparatus employing an absolute value comparator. With reference to FIG. 13, this video signal processing apparatus includes an A/D converter 90 for receiving a video signal to be processed, field memories 91 and 92 for storing converted video data therein for each field, a correlation operating unit 94 for evaluating a correlation between fields with respect to video data, a motion vector detector 95 for detecting a motion vector on the basis of the evaluated correlation, an image correcting circuit 96 for carrying out an image correcting processing with respect to video data in accordance with the motion vector, and a decoder 97 for decoding corrected data to output an image signal.
The video signal processing apparatus shown in FIG. 13 is applied in, for example, a portable image input apparatus requiring a real time processing. Since a motion vector which is necessary to carry out an image correction is detected from an applied video signal, the correlation operating unit 94 incorporating an absolute value comparator 93 is provided prior to the motion vector detector 95. The correlation operating unit 94 is implemented by software (or programming) in some case; however, the unit 94 is unable to process data at high speed in that case. For achieving a high speed data processing, the correlation operating unit 94 is constituted by hardware, i.e., an electronic circuit.
It is thus desirable that the absolute value comparator 93 incorporated in the correlation operating unit 94 is also constituted by hardware in order to achieve a high speed processing. The absolute value comparator 93 sequentially receives video data of two fields stored in the field memories 91 and 92 and compares absolute values of the received data. In some case, the absolute value comparator 93 receives video data at the same time directly from each of the field memories 91 and 92 as shown by the dotted line of FIG. 13, and compares absolute values of two field data. The absolute value comparator 93 determines the magnitude of the absolute values of the two applied data, and outputs a difference between the two absolute value data, a total sum of the difference between sequentially applied two absolute value data, and the like.
As described above, when the absolute value comparator 93 is implemented by software, a high processing speed is not obtained, and hence, the absolute value comparator 93 is constituted by hardware, i.e., an electronic circuit. In such an absolute value comparator circuit, however, (1) it is necessary to determine a positive or a negative of two applied data before an operation is carried out, and (2) a delay in transmission of a carry signal cannot be avoided in a full adder for performing addition and subtraction of two applied data. Thus, a comparing processing is time-consuming, and a high processing speed is not obtained. The delay of the carry signal in the full adder becomes increased with an increase in the number of bits of data to be compared, resulting in a large problem in the actual absolute value comparator. Further, an area on a semiconductor substrate occupied by the absolute value comparator 93 is reduced, which implies an importance of simplification of a circuit configuration.